Model synthesis from VHDL for the functional test generation system
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Model synthesis from VHDL for the functional test generation system

Technical data

Publisher:
Tallinna Tehnikaülikool
Published:
Language:
English
Depositor:
Tartu Ülikooli raamatukogu
Funding:
Digiteerimist rahastas Euroopa Regionaalarengu Fond
Type:
manuscript
Copyrighted
Kehtiv autoriõigus (INC) - https://rightsstatements.org/page/InC/1.0/?language=et
ESTER
b20905099
ISBN

URL: http://www.digar.ee/id/nlib-digar:967243

Keywords

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